Posts Tagged ‘Integer Linear Programming’:

Coreference Resolution Based on Anaphricity Identification and Global Optimization

This paper mainly focuses on the research of using anaphoricity identification and global optimization to improve the coreference resolution. By using coreference determination result feedback and tunable parameter, the coreference resolution can combine with different anaphoricity identification.We treat the anaphoricity identification as a classification problem, and apply maximum entropy model and 70 features to build

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2D Pose Estimation Based on Segmentation Consistency

Two-dimension human body pose estimation is to distinguish the position, orientation and scale of each body part in still image. First, each body part is detected in a image using part detectors, such as head, torso and so on. Then according to the kinematics relationship between every body part, all part candidates can be combined

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Research on Cutting Plane and Ant Colony Algorithm for Rual Postman Problem with Time Dependent Travel Times

Chinese Postman problem is the arc routing problem and a classic problem in graph theory. As a variant of Chinese Postman problem, rural postal routes problem has been studied extensively. The problem in street sweeping, garbage collection, mail delivery route, school bus routes, the robot detects line route optimization and software test sequences.etc has important

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Software Pipelining on Transport Triggered Architecture

On transport triggered architectures (TTAs) featuring huge scheduling freedom, parallelism is exploited at not only operation level, but also data transportation level. Multi-TTA cores are usually used to handle multimedia computing. Thus, HW/SW partitioning and task level pipelined scheduling are very important. Moreover, software pipelining is an aggressive compiler optimization scheme for exploiting instruction level

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Further Examination for Iterative Siphon Control in Petri Nets

This thesis focuses on deadlock prevention in Petri nets. Three algorithms of siphon iterative control are first analysized and examined. The three algorithms, based on covering set of uncontolled minimal siphons, combine markings with minimal siphons. The states of a Petri net are considerated as well, which makes a Petri net, by means in the

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Column Generation Algorithm for the Time Dependent Chinese Postman Problem

The Chinese Postman Problem is one of the classical problems in graph theory.It has received much research because of its wide range of applications, for example, garbage collection, milk or mail delivery, school bus transportation, parking meter collection, electric meter reading, electrical lines and gas mains inspection, etc.With the rapid development of computer networks, communication

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Iterative Deadlock Control Policies in Petri Nets

Iterative deadlock control is a kind of methods to address deadlock prevention ofPetri nets. Control places are added for uncontrolled siphons until the controlled net hasno emptiable siphon or dead state. In the Iterative processes, control places usuallyresult the controlled net being a generalized Petri net. In fat, adding control place canonly prevent a siphon

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Study on Survivability and Traffic Grooming in WDM Optical Networks

Wavelength Division Multiplexing (WDM) optical networks, based on wavelength division multiplexing and wavelength-routed technology, are one of the most competitive candidates for next generation high speed WAN backbone and MAN. It features not only on the huge bandwidth, but also on the transparency of different transport code rates, data formats and modulations. WDM optical networks

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Research on Valiant Load-Balancing in Broadband Communication Networks

THE approach of Valiant Load-Balancing is first proposed in multi-processor interconnection networks. In the approach of Valiant Load-Balancing, each node spreads the task assigned by the distributed system to all the nodes. The traffic load for the system is balanced and the efficiency is greatly improved. In recent years, with the explosive increase of Internet

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The Study of Pseudo-Boolean Satisfiability Algorithm and Its Application in FPGA Routing

Field Programmable Gate Array (FPGA) contains reconfigurable logic blocks and routing resources, belongs to digital integrated circuits. FPGA supports programmable reconfiguration, and makes great saving in processing cost and time. Due to its flexibility, low risk, short development cycle and other advantages, FPGA is widely applied in communications, industrial control, automotive electronics, data processing, consumer

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