Microcontroller (MCU) appears nearly 40 years, in consumer electronics, automobile electronics and industrial application areas to be widely used, along with integrated circuit system into system on chip (SOC) era, MCU not only can be used as a single chip in embedded systems, can also act as IP core integrated into VLSI, in domestic market,
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The research work is part of a project aimed at the design of a high performance low-power 16-bit fixed-point digital signals processor (named FT-C55LP). The target of FT-C55LP is compatible with TMS320C55x DSP. This paper focuses on the Top-Down design and Bottom-Up verification of two computation units of FT-C55LP which are Bit-Process unit and dual-MAC
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For DSPs dealing with operations such as convolution, filtering, FFT which consist of repeated additions and multiplications, a multiplier handling the work fast and efficiently becomes a key role. What’s more, the number of multiply-add operations a DSP can achieve per second is one of the most important indices evaluating the performance. The model XDSP,
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