Research of Digital Down Converter Based on FPGA

on May 27th, 2012 by - Comments Off
Title Research of Digital Down Converter Based on FPGA
Abstract

The article objects on the design of Digital Down Converter(DDC) in software radio receiver which is applicated more and more extensive.The article introduces the background,the significance and the present situation of Digital Down Converter research.Digital Down Converter is the main part of the software radio system.It alleviates the pressure of the DSP processing speed through the digital signal sampling rate transformation.FPGA,a new developing field programmable gate array device technology in these years,wins more extensive application in DSP with its advantages of low power,high credibility,in-circuit reconfigurability and low cost.The article focuses on the implement based on FPGA.The design uses Xilinx Spartan XC3S400pq208,all the parameter should be considered along with the hardware.Digital Down Converter system includes two major parts:programmable down converter module,and high efficient decimation filter module.The technology of DDS(Direct Digital Frequency) is utilized in programmable down converter module; And the high efficient decimation filter module consists of CIC,HB and raised cosine filter.The article introduces the basic theory of the two major module,and detailed research on the related issue and algorithms of DDC system;HB utilizes the DA (Distributed Algorithms).The operation velocity is only related to data width.DA avoid multiplication,only include binary additive、subtractive and division operations which decrease the system resource and operation time as well.Switch polyphase decimation filter is utilized in raised cosine filter that increase the utilization rate of multiplier, decrease the accumulate error of filter operation and achieve the high-efficient realtime process.Base on hardware resources the major functions of DDC system and performance restriction in between are considered.Choose the rational parameters by MATLAB simulation,then under the ISE8.2 development environment of Xilinx,the DDC system is design and implement by Verilog hardware description language program in FPGA. Finally,prove the exactness of Digital Down Converter system by ModelSim simulation testing.

Category Radio
Keywords CIC, D/A, Digital down converter, FPGA, HB,
FileType PDF
Pages 105
Price US$60.00
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